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authorXiaochen Shen <xiaochen.shen@intel.com>2017-05-03 11:15:56 +0800
committerThomas Gleixner <tglx@linutronix.de>2017-05-09 09:41:42 +0200
commitfb8fb46c56289b3f34b5d90a4ec65e9e4e4544a5 (patch)
treef7ad2c1b3c93ce6582a29ce2018a7dc3e68770c5 /Documentation
parent4a1bec4605838fd7872ec41677585e241e256785 (diff)
x86/intel_rdt: Fix a typo in Documentation
Example 3 contains a typo: "C0" in "# echo C0 > p0/cpus" is wrong because it specifies core 6-7 instead of wanted core 4-7. Correct this typo to avoid confusion. Signed-off-by: Xiaochen Shen <xiaochen.shen@intel.com> Acked-by: Fenghua Yu <fenghua.yu@intel.com> Cc: vikas.shivappa@linux.intel.com Cc: tony.luck@intel.com Link: http://lkml.kernel.org/r/1493781356-24229-1-git-send-email-xiaochen.shen@intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/x86/intel_rdt_ui.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86/intel_rdt_ui.txt
index 0f6d8477b66c..c491a1b82de2 100644
--- a/Documentation/x86/intel_rdt_ui.txt
+++ b/Documentation/x86/intel_rdt_ui.txt
@@ -295,7 +295,7 @@ kernel and the tasks running there get 50% of the cache. They should
also get 50% of memory bandwidth assuming that the cores 4-7 are SMT
siblings and only the real time threads are scheduled on the cores 4-7.
-# echo C0 > p0/cpus
+# echo F0 > p0/cpus
4) Locking between applications