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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2017-09-04 12:48:43 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-10-03 20:36:49 -0700
commitef833eab1ddec06982ea620086b03d67ef4ddf9b (patch)
tree6d96b27c0b4e90d107c7ecf5a0853364d01a9402 /MAINTAINERS
parent9583833e9e3628177661e815e5ce80dd3955d82f (diff)
ARC: [plat-hsdk] use actual clk driver to manage cpu clk
With corresponding clk driver now merged upstream, switch to it. - core_clk now represent the PLL (vs. fixed clk before) - input_clk represent the clk signal src for PLL (basically xtal) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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