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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-12-04 19:06:18 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-12-04 19:06:18 -0800 |
| commit | 056df578c2dcac1e624254567f5df5ddaa223234 (patch) | |
| tree | a19197bded5e2d2ee6219d502d6e9a3e42dd1e6f /arch/arc/include/asm/mmu.h | |
| parent | aedc0650f9135f3b92b39cbed1a8fe98d8088825 (diff) | |
| parent | 9fbea0b7e842890a76acffce9be9e430b9e11194 (diff) | |
Merge tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta
- Jump Label support for ARC
- kmemleak enabled
- arc mm backend TLB Miss / flush optimizations
- nSIM platform switching to dwuart (vs. arcuart) and ensuing defconfig
updates and cleanups
- axs platform pll / video-mode updates
* tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: add kmemleak support
ARC: [plat-axs10x]: remove hardcoded video mode from bootargs
ARC: [plat-axs10x]: use pgu pll instead of fixed clock
ARC: ARCv2: jump label: implement jump label patching
ARC: mm: tlb flush optim: elide redundant uTLB invalidates for MMUv3
ARC: mm: tlb flush optim: elide repeated uTLB invalidate in loop
ARC: mm: tlb flush optim: Make TLBWriteNI fallback to TLBWrite if not available
ARC: mm: TLB Miss optim: avoid re-reading ECR
ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD
ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg
ARC: nSIM_700: remove unused network options
ARC: nSIM_700: switch to DW UART usage
ARC: merge HAPS-HS with nSIM-HS configs
ARC: HAPS: cleanup defconfigs from unused ETH drivers
ARC: HAPS: add HIGHMEM memory zone to DTS
ARC: HAPS: use same UART configuration everywhere
ARC: HAPS: cleanup defconfigs from unused IO-related options
ARC: regenerate nSIM and HAPS defconfigs
Diffstat (limited to 'arch/arc/include/asm/mmu.h')
| -rw-r--r-- | arch/arc/include/asm/mmu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h index 98cadf1a09ac..26b731d32a2b 100644 --- a/arch/arc/include/asm/mmu.h +++ b/arch/arc/include/asm/mmu.h @@ -40,6 +40,10 @@ #define ARC_REG_SCRATCH_DATA0 0x46c #endif +#if defined(CONFIG_ISA_ARCV2) || !defined(CONFIG_SMP) +#define ARC_USE_SCRATCH_REG +#endif + /* Bits in MMU PID register */ #define __TLB_ENABLE (1 << 31) #define __PROG_ENABLE (1 << 30) @@ -63,6 +67,8 @@ #if (CONFIG_ARC_MMU_VER >= 2) #define TLBWriteNI 0x5 /* write JTLB without inv uTLBs */ #define TLBIVUTLB 0x6 /* explicitly inv uTLBs */ +#else +#define TLBWriteNI TLBWrite /* Not present in hardware, fallback */ #endif #if (CONFIG_ARC_MMU_VER >= 4) |