diff options
| author | Vineet Gupta <vgupta@synopsys.com> | 2013-09-12 13:53:06 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2013-11-06 10:41:40 +0530 |
| commit | 54c8bff14d604de23d0718eee59c5436a4703fe5 (patch) | |
| tree | 2afb7639568befca863408e49df9292a301e96ad /arch/arc/kernel/irq.c | |
| parent | 07ba69a46c3394fe6675483275337e5a79a959e0 (diff) | |
ARC: Reset the value of Interrupt Priority Register
In case bootloader has changed the priority of one/more IRQ lines
Reported-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/irq.c')
| -rw-r--r-- | arch/arc/kernel/irq.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c index 5fc92455da36..02684e1a0cf0 100644 --- a/arch/arc/kernel/irq.c +++ b/arch/arc/kernel/irq.c @@ -39,10 +39,14 @@ void arc_init_IRQ(void) level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5; level_mask |= IS_ENABLED(CONFIG_ARC_IRQ6_LV2) << 6; - if (level_mask) { + /* + * Write to register, even if no LV2 IRQs configured to reset it + * in case bootloader had mucked with it + */ + write_aux_reg(AUX_IRQ_LEV, level_mask); + + if (level_mask) pr_info("Level-2 interrupts bitset %x\n", level_mask); - write_aux_reg(AUX_IRQ_LEV, level_mask); - } } /* |