diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2023-03-19 21:29:36 +0000 |
|---|---|---|
| committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2023-03-23 21:57:34 +0100 |
| commit | cc1858614f5d99d87d4467079c25f6bdf434add9 (patch) | |
| tree | 1a6ab38ba92cb7c05ca3aef1a9b0d0b377cd6d3d /arch/arm/boot/dts/Makefile | |
| parent | 7452d4799c5b352d6987cff3db8b1e415466586e (diff) | |
ARM: dts: suniv: Add Lctech Pi F1C200s devicetree
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.
Alongside the obligatory micro-SD card slot, the board features a
SPI-NAND flash chip, LCD and touch connectors, and unpopulated
expansion header pins.
There are two USB Type-C ports on the board: One supplies the power, also
connects to the USB MUSB OTG controller port. The other one is connected
to an CH340 USB serial chip, which in turn is connected to UART1.
Add a devicetree file, so that the board can be used easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/Makefile')
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3b97d7c1e3c2..a627d5593e51 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1407,6 +1407,7 @@ dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-cubieboard4.dtb dtb-$(CONFIG_MACH_SUNIV) += \ suniv-f1c100s-licheepi-nano.dtb \ + suniv-f1c200s-lctech-pi.dtb \ suniv-f1c200s-popstick-v1.1.dtb dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ tegra20-acer-a500-picasso.dtb \ |