diff options
| author | Tony Lindgren <tony@atomide.com> | 2019-07-22 03:44:42 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2019-07-24 00:51:27 -0700 |
| commit | 89bbc6f1eb90809b1538b3a9c54030c558180e3b (patch) | |
| tree | 9ab50f10f91e9481d53e6068b4c611fe4d801378 /arch/arm/boot/dts/am33xx-l4.dtsi | |
| parent | 2e8647bbe1c8233a20c32fd2648258f2c05c7335 (diff) | |
ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7
We are currently using a wrong register for dcan revision. Although
this is currently only used for detecting the dcan module, let's
fix it to avoid confusion.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx-l4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am33xx-l4.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index ced1a19d5f89..4bd22c1edf96 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -1758,6 +1758,8 @@ target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0xcc020 0x4>; + reg-names = "rev"; ti,hwmods = "d_can0"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, @@ -1780,6 +1782,8 @@ target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0xd0020 0x4>; + reg-names = "rev"; ti,hwmods = "d_can1"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, |