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authorRoger Quadros <rogerq@ti.com>2014-09-09 16:15:35 +0300
committerTony Lindgren <tony@atomide.com>2014-11-24 07:56:15 -0800
commite23aabc6e607dfc49ba22855264e78abef1fda34 (patch)
tree1b14defa7da26f5928ca720cb83941a32046bd6c /arch/arm/boot/dts/am33xx.dtsi
parent63728d57279a1bf48618230c15f7b49179f0d64d (diff)
ARM: dts: am33xx: Update DCAN nodes
Add "raminit-syscon" property to specify the RAMINIT register. Add clock information. Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi20
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 887e86addcef..befe713b3e1b 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -344,20 +344,24 @@
interrupts = <91>;
};
- dcan0: d_can@481cc000 {
- compatible = "bosch,d_can";
+ dcan0: can@481cc000 {
+ compatible = "ti,am3352-d_can";
ti,hwmods = "d_can0";
- reg = <0x481cc000 0x2000
- 0x44e10644 0x4>;
+ reg = <0x481cc000 0x2000>;
+ clocks = <&dcan0_fck>;
+ clock-names = "fck";
+ syscon-raminit = <&am33xx_control_module 0x644 0>;
interrupts = <52>;
status = "disabled";
};
- dcan1: d_can@481d0000 {
- compatible = "bosch,d_can";
+ dcan1: can@481d0000 {
+ compatible = "ti,am3352-d_can";
ti,hwmods = "d_can1";
- reg = <0x481d0000 0x2000
- 0x44e10644 0x4>;
+ reg = <0x481d0000 0x2000>;
+ clocks = <&dcan1_fck>;
+ clock-names = "fck";
+ syscon-raminit = <&am33xx_control_module 0x644 1>;
interrupts = <55>;
status = "disabled";
};