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authorLinus Torvalds <torvalds@linux-foundation.org>2021-09-01 15:39:09 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2021-09-01 15:39:09 -0700
commit7c636d4d20f8c5acfbfbc60f326fddb0e1cf5daa (patch)
treeccd1b1f27386ce7768cac58fc420be62c3bb60ca /arch/arm/boot/dts/am4372.dtsi
parent32b47072f319bb65e9afad59e78153d83496f1f5 (diff)
parent9e62ec0e661ca7161e5830bdbf8e69831b41e866 (diff)
Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann: "As usual, the bulk of work in the SoC tree goes into DT files, this time with a roughly even split between 32-bit and 64-bit SoCs rather than the usual mostly 64-bit changes. New SoCs: - Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit platform based on the older SAMA5 series. - Qualcomm Snapdragon SDM636 and SM8150, variations of the existing phone SoCs. - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas SoCs. New boards: - Marvell CN913x reference boards - ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert and Fuji server boards. - Snapdragon 665 based Sony Xperia 10II - Snapdragon MSM8916 based Xiaomi Redmi 2 - Snapdragon MSM8226 based Samsung Galaxy S3 Neo - NXP i.MX based 32-bit boards: - DHCOM based PicoITX - DHSOM based DRC0ỉ - SolidRun SolidSense - SKOV i.MX6 boards. - NXP i.MX based 64-bit boards: - Nitrogen8 SoM and MNT Reform2 - LS1088A based Traverse Ten64 - i.MX8M based GW7902. - NVIDIA Jetson TX2 NX Developer Kit - 4KOpen STiH418-b2264 development board - ux500 based Samsung phones: Gavini, Codina and Kyle - TI AM335x based Sancloud BBE Lite - ixp4xx dts files to replace all old board files Other changes: - Treewide fixes for dtc warnings - Rockchips i/o domain support - TI OMAP/AM3 CPSW switch driver support - Improved device support for allwinner, aspeed, qualcomm, NXP, nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti, OMAP and actions" * tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits) arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings ARM: dts: rockchip: Add SFC to RV1108 arm64: dts: marvell: armada-37xx: Extend PCIe MEM space ARM: dts: aspeed: p10bmc: Add power control pins ARM: dts: aspeed: cloudripper: Add comments for "mdio1" ARM: dts: aspeed: minipack: Update flash partition table dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board dt-bindings: vendor-prefixes: add Traverse Technologies arm64: dts: add device tree for Traverse Ten64 (LS1088A) arm64: dts: ls1088a: add missing PMU node arm64: dts: ls1088a: add internal PCS for DPMAC1 node ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node ARM: dts: add SKOV imx6q and imx6dl based boards dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards dt-bindings: vendor-prefixes: Add an entry for SKOV A/S arm64: dts: imx8mq-reform2: add sound support arm64: dts: imx8m: drop interrupt-affinity for pmu arm64: dts: imx8qxp: update pmu compatible arm64: dts: imx8mm: update pmu compatible ...
Diffstat (limited to 'arch/arm/boot/dts/am4372.dtsi')
-rw-r--r--arch/arm/boot/dts/am4372.dtsi165
1 files changed, 165 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 57a85a6c34a2..61a1d88f9df6 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -434,6 +434,171 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x54400000 0x80000>;
+
+ pruss1: pruss@0 {
+ compatible = "ti,am4376-pruss1";
+ reg = <0x0 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pruss1_mem: memories@0 {
+ reg = <0x0 0x2000>,
+ <0x2000 0x2000>,
+ <0x10000 0x8000>;
+ reg-names = "dram0", "dram1",
+ "shrdram2";
+ };
+
+ pruss1_cfg: cfg@26000 {
+ compatible = "ti,pruss-cfg", "syscon";
+ reg = <0x26000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x26000 0x2000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pruss1_iepclk_mux: iepclk-mux@30 {
+ reg = <0x30>;
+ #clock-cells = <0>;
+ clocks = <&sysclk_div>, /* icss_iep_gclk */
+ <&pruss_ocp_gclk>; /* icss_ocp_gclk */
+ };
+ };
+ };
+
+ pruss1_mii_rt: mii-rt@32000 {
+ compatible = "ti,pruss-mii", "syscon";
+ reg = <0x32000 0x58>;
+ };
+
+ pruss1_intc: interrupt-controller@20000 {
+ compatible = "ti,pruss-intc";
+ reg = <0x20000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host_intr0", "host_intr1",
+ "host_intr2", "host_intr3",
+ "host_intr4",
+ "host_intr6", "host_intr7";
+ ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
+ };
+
+ pru1_0: pru@34000 {
+ compatible = "ti,am4376-pru";
+ reg = <0x34000 0x3000>,
+ <0x22000 0x400>,
+ <0x22400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am437x-pru1_0-fw";
+ };
+
+ pru1_1: pru@38000 {
+ compatible = "ti,am4376-pru";
+ reg = <0x38000 0x3000>,
+ <0x24000 0x400>,
+ <0x24400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am437x-pru1_1-fw";
+ };
+
+ pruss1_mdio: mdio@32400 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x32400 0x90>;
+ clocks = <&dpll_core_m4_ck>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ pruss0: pruss@40000 {
+ compatible = "ti,am4376-pruss0";
+ reg = <0x40000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pruss0_mem: memories@40000 {
+ reg = <0x40000 0x1000>,
+ <0x42000 0x1000>;
+ reg-names = "dram0", "dram1";
+ };
+
+ pruss0_cfg: cfg@66000 {
+ compatible = "ti,pruss-cfg", "syscon";
+ reg = <0x66000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x66000 0x2000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pruss0_iepclk_mux: iepclk-mux@30 {
+ reg = <0x30>;
+ #clock-cells = <0>;
+ clocks = <&sysclk_div>, /* icss_iep_gclk */
+ <&pruss_ocp_gclk>; /* icss_ocp_gclk */
+ };
+ };
+ };
+
+ pruss0_mii_rt: mii-rt@72000 {
+ compatible = "ti,pruss-mii", "syscon";
+ reg = <0x72000 0x58>;
+ status = "disabled";
+ };
+
+ pruss0_intc: interrupt-controller@60000 {
+ compatible = "ti,pruss-intc";
+ reg = <0x60000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host_intr0", "host_intr1",
+ "host_intr2", "host_intr3",
+ "host_intr4",
+ "host_intr6", "host_intr7";
+ ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
+ };
+
+ pru0_0: pru@74000 {
+ compatible = "ti,am4376-pru";
+ reg = <0x74000 0x1000>,
+ <0x62000 0x400>,
+ <0x62400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am437x-pru0_0-fw";
+ };
+
+ pru0_1: pru@78000 {
+ compatible = "ti,am4376-pru";
+ reg = <0x78000 0x1000>,
+ <0x64000 0x400>,
+ <0x64400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am437x-pru0_1-fw";
+ };
+ };
};
target-module@50000000 {