ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

1 files changed, 0 insertions, 245 deletions

diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi
deleted file mode 100644
index f8a06ae4a3c9..000000000000
--- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
+++ /dev/null
@@ -1,245 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Device Tree include file for SolidRun Clearfog 88F6828 based boards
- *
- *  Copyright (C) 2015 Russell King
- */
-
-#include "armada-388.dtsi"
-#include "armada-38x-solidrun-microsom.dtsi"
-
-/ {
-	aliases {
-		/* So that mvebu u-boot can update the MAC addresses */
-		ethernet1 = &eth0;
-		ethernet2 = &eth1;
-		ethernet3 = &eth2;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	reg_3p3v: regulator-3p3v {
-		compatible = "regulator-fixed";
-		regulator-name = "3P3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-always-on;
-	};
-
-	soc {
-		internal-regs {
-			sata@a8000 {
-				/* pinctrl? */
-				status = "okay";
-			};
-
-			sata@e0000 {
-				/* pinctrl? */
-				status = "okay";
-			};
-
-			sdhci@d8000 {
-				bus-width = <4>;
-				cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
-				no-1-8-v;
-				pinctrl-0 = <&microsom_sdhci_pins
-					     &clearfog_sdhci_cd_pins>;
-				pinctrl-names = "default";
-				status = "okay";
-				vmmc-supply = <&reg_3p3v>;
-				wp-inverted;
-			};
-
-			usb@58000 {
-				/* CON3, nearest  power. */
-				status = "okay";
-			};
-
-			usb3@f8000 {
-				/* CON7 */
-				status = "okay";
-			};
-		};
-
-		pcie {
-			status = "okay";
-			/*
-			 * The two PCIe units are accessible through
-			 * the mini-PCIe connectors on the board.
-			 */
-			pcie@2,0 {
-				/* Port 1, Lane 0. CON3, nearest power. */
-				reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
-				status = "okay";
-			};
-		};
-	};
-
-	sfp: sfp {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
-		maximum-power-milliwatt = <2000>;
-	};
-};
-
-&eth1 {
-	/* ethernet@30000 */
-	bm,pool-long = <2>;
-	bm,pool-short = <1>;
-	buffer-manager = <&bm>;
-	phys = <&comphy1 1>;
-	phy-mode = "sgmii";
-	status = "okay";
-};
-
-&eth2 {
-	/* ethernet@34000 */
-	bm,pool-long = <3>;
-	bm,pool-short = <1>;
-	buffer-manager = <&bm>;
-	managed = "in-band-status";
-	phys = <&comphy5 2>;
-	phy-mode = "sgmii";
-	sfp = <&sfp>;
-	status = "okay";
-};
-
-&i2c0 {
-	/*
-	 * PCA9655 GPIO expander, up to 1MHz clock.
-	 *  0-CON3 CLKREQ#
-	 *  1-CON3 PERST#
-	 *  2-
-	 *  3-CON3 W_DISABLE
-	 *  4-
-	 *  5-USB3 overcurrent
-	 *  6-USB3 power
-	 *  7-
-	 *  8-JP4 P1
-	 *  9-JP4 P4
-	 * 10-JP4 P5
-	 * 11-m.2 DEVSLP
-	 * 12-SFP_LOS
-	 * 13-SFP_TX_FAULT
-	 * 14-SFP_TX_DISABLE
-	 * 15-SFP_MOD_DEF0
-	 */
-	expander0: gpio-expander@20 {
-		/*
-		 * This is how it should be:
-		 * compatible = "onnn,pca9655", "nxp,pca9555";
-		 * but you can't do this because of the way I2C works.
-		 */
-		compatible = "nxp,pca9555";
-		gpio-controller;
-		#gpio-cells = <2>;
-		reg = <0x20>;
-
-		pcie1-0-clkreq-hog {
-			gpio-hog;
-			gpios = <0 GPIO_ACTIVE_LOW>;
-			input;
-			line-name = "pcie1.0-clkreq";
-		};
-		pcie1-0-w-disable-hog {
-			gpio-hog;
-			gpios = <3 GPIO_ACTIVE_LOW>;
-			output-low;
-			line-name = "pcie1.0-w-disable";
-		};
-		usb3-ilimit-hog {
-			gpio-hog;
-			gpios = <5 GPIO_ACTIVE_LOW>;
-			input;
-			line-name = "usb3-current-limit";
-		};
-		usb3-power-hog {
-			gpio-hog;
-			gpios = <6 GPIO_ACTIVE_HIGH>;
-			output-high;
-			line-name = "usb3-power";
-		};
-		m2-devslp-hog {
-			gpio-hog;
-			gpios = <11 GPIO_ACTIVE_HIGH>;
-			output-low;
-			line-name = "m.2 devslp";
-		};
-	};
-
-	/* The MCP3021 supports standard and fast modes */
-	mikrobus_adc: mcp3021@4c {
-		compatible = "microchip,mcp3021";
-		reg = <0x4c>;
-	};
-
-	eeprom@52 {
-		compatible = "atmel,24c02";
-		reg = <0x52>;
-		pagesize = <16>;
-	};
-};
-
-&i2c1 {
-	/*
-	 * Routed to SFP, mikrobus, and PCIe.
-	 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
-	 *  address pins tied low, which takes addresses 0x50 and 0x51.
-	 * Mikrobus doesn't specify beyond an I2C bus being present.
-	 * PCIe uses ARP to assign addresses, or 0x63-0x64.
-	 */
-	clock-frequency = <100000>;
-	pinctrl-0 = <&clearfog_i2c1_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&pinctrl {
-	clearfog_i2c1_pins: i2c1-pins {
-		/* SFP, PCIe, mSATA, mikrobus */
-		marvell,pins = "mpp26", "mpp27";
-		marvell,function = "i2c1";
-	};
-	clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
-		marvell,pins = "mpp20";
-		marvell,function = "gpio";
-	};
-	mikro_pins: mikro-pins {
-		/* int: mpp22 rst: mpp29 */
-		marvell,pins = "mpp22", "mpp29";
-		marvell,function = "gpio";
-	};
-	mikro_spi_pins: mikro-spi-pins {
-		marvell,pins = "mpp43";
-		marvell,function = "spi1";
-	};
-	mikro_uart_pins: mikro-uart-pins {
-		marvell,pins = "mpp24", "mpp25";
-		marvell,function = "ua1";
-	};
-};
-
-&spi1 {
-	/*
-	 * Add SPI CS pins for clearfog:
-	 * CS0: W25Q32
-	 * CS1: PIC microcontroller (Pro models)
-	 * CS2: mikrobus
-	 */
-	pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&uart1 {
-	/* mikrobus uart */
-	pinctrl-0 = <&mikro_uart_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-};