diff options
| author | Chia-Wei Wang <chiawei_wang@aspeedtech.com> | 2021-09-27 10:30:53 +0800 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-10-21 16:59:53 +1030 |
| commit | f9241fe8b9652e6751f4ae684efe0148e3c157c7 (patch) | |
| tree | 5a38eedb61528e2534e5d4ec5b7685682baacb10 /arch/arm/boot/dts/aspeed-g4.dtsi | |
| parent | 9d20948ffdd2e8fb36645514108ff4cf2266e4f9 (diff) | |
ARM: dts: aspeed: Add uart routing to device tree
Add LPC uart routing to the device tree for Aspeed SoCs.
Signed-off-by: Oskar Senft <osk@google.com>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Tested-by: Lei YU <yulei.sh@bytedance.com>
Link: https://lore.kernel.org/r/20210927023053.6728-6-chiawei_wang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index c5aeb3cf3a09..b313a1cf5f73 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -383,6 +383,12 @@ interrupts = <8>; status = "disabled"; }; + + uart_routing: uart-routing@9c { + compatible = "aspeed,ast2400-uart-routing"; + reg = <0x9c 0x4>; + status = "disabled"; + }; }; uart2: serial@1e78d000 { |