diff options
| author | Bartosz Golaszewski <bgolaszewski@baylibre.com> | 2016-12-13 11:09:19 +0100 |
|---|---|---|
| committer | Sekhar Nori <nsekhar@ti.com> | 2017-01-02 17:01:05 +0530 |
| commit | 7c93931e4cee25315173ec40b8a52a02d070f852 (patch) | |
| tree | f2db57eabe6091004d5c101cac98363052936cce /arch/arm/boot/dts/da850.dtsi | |
| parent | c982534433b490030b84782e5a46c1c339dd09e0 (diff) | |
ARM: dts: da850: specify the maximum pixel clock rate for tilcdc
At maximum CPU frequency of 300 MHz the maximum pixel clock frequency
is 37.5 MHz[1]. We must filter out any mode for which the calculated
pixel clock rate would exceed this value.
Specify the max-pixelclock property for the display node for
da850-lcdk.
[1] http://www.ti.com/lit/ds/symlink/am1808.pdf
(SPRS653E, revised March 2014, table 6-110)
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
[nsekhar@ti.com: commit message update]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/da850.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/da850.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 6b0ef3daf9d4..58b1566ebf8c 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -462,6 +462,7 @@ compatible = "ti,da850-tilcdc"; reg = <0x213000 0x1000>; interrupts = <52>; + max-pixelclock = <37500>; status = "disabled"; }; }; |