diff options
| author | Tony Lindgren <tony@atomide.com> | 2021-01-18 10:03:24 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2021-01-18 10:03:24 +0200 |
| commit | 87ab16b644f33620db395c1f569b0fca8768161a (patch) | |
| tree | 31764e1de6544ddcac5a98371c0d36e7e9e36d26 /arch/arm/boot/dts/dra76x.dtsi | |
| parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
| parent | 4d4ce69f19d4991701e84d5eaa0fc0e506210042 (diff) | |
Merge tag 'omap-for-v5.11/dt-late-signed' into omap-for-v5.12-dt
Late devicetree changes for omaps for v5.11 merge window
Here are few more late changes that would be nice to get into v5.11:
- More updates to use cpsw switchdev driver
- Enable gta04 PMIC power management
- Updates for dra7 for ECC support, 1.8GHz speed and keep the
ldo0 regulator always on as specified in the data manual
Diffstat (limited to 'arch/arm/boot/dts/dra76x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dra76x.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index 2f326151116b..a09e7bd77fc7 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -9,6 +9,13 @@ compatible = "ti,dra762", "ti,dra7"; ocp { + emif1: emif@4c000000 { + compatible = "ti,emif-dra7xx"; + reg = <0x4c000000 0x200>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + target-module@42c01900 { compatible = "ti,sysc-dra7-mcan", "ti,sysc"; ranges = <0x0 0x42c00000 0x2000>; @@ -133,3 +140,32 @@ /* dra76x is not affected by i887 */ max-frequency = <96000000>; }; + +&cpu0_opp_table { + opp_plus@1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1250000 950000 1250000>, + <1250000 950000 1250000>; + opp-supported-hw = <0xFF 0x08>; + }; +}; + +&opp_supply_mpu { + ti,efuse-settings = < + /* uV offset */ + 1060000 0x0 + 1160000 0x4 + 1210000 0x8 + 1250000 0xC + >; +}; + +&abb_mpu { + ti,abb_info = < + /*uV ABB efuse rbb_m fbb_m vset_m*/ + 1060000 0 0x0 0 0x02000000 0x01F00000 + 1160000 0 0x4 0 0x02000000 0x01F00000 + 1210000 0 0x8 0 0x02000000 0x01F00000 + 1250000 0 0xC 0 0x02000000 0x01F00000 + >; +}; |