diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2020-03-27 13:53:17 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-04-13 11:42:36 +0200 |
| commit | 95384e977c426e73971e7393c393ccce66c084ec (patch) | |
| tree | 92a9fdd877db7843ca7220308d4d8c1ad8a66eb0 /arch/arm/boot/dts/exynos3250-rinato.dts | |
| parent | d22928095975acd4ac6c9fd5df768ffde82ebfdf (diff) | |
ARM: dts: exynos: Enable WLAN support for the Rinato board
Add a node for BCM43342A SDIO chip on MSHC bus #1 and the required MMC
power sequence node for the Exynos3250-based Rinato board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos3250-rinato.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250-rinato.dts | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 1b48151a84cf..aba8350cfdaf 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -50,6 +50,11 @@ }; }; + wlan_pwrseq: mshc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>; + }; + i2c_max77836: i2c-gpio-0 { compatible = "i2c-gpio"; sda-gpios = <&gpd0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; @@ -624,6 +629,35 @@ status = "okay"; }; +&mshc_1 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + non-removable; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + samsung,dw-mshc-ciu-div = <1>; + samsung,dw-mshc-sdr-timing = <0 1>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus1 &sd1_bus4>; + bus-width = <4>; + + mmc-pwrseq = <&wlan_pwrseq>; + + brcmf: wifi@1 { + compatible = "brcm,bcm4334-fmac"; + reg = <1>; + + interrupt-parent = <&gpx1>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + }; +}; + &serial_0 { assigned-clocks = <&cmu CLK_SCLK_UART0>; assigned-clock-rates = <100000000>; |