diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2020-07-10 07:19:37 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-07-13 19:48:53 +0800 |
| commit | fa28d8212ede9c533ae87a737571a9d3b3eebb29 (patch) | |
| tree | 72b8f82b0e6c85a4703e88864b738e5025e8f270 /arch/arm/boot/dts/imx6sll.dtsi | |
| parent | 5c73d9acd1220d4ae32d3803a8e3205f994ef7c7 (diff) | |
ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.
This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sll.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index 554a31ea9c07..fb5d3bc50c6b 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -321,7 +321,7 @@ clocks = <&clks IMX6SLL_CLK_PWM1>, <&clks IMX6SLL_CLK_PWM1>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; }; pwm2: pwm@2084000 { @@ -331,7 +331,7 @@ clocks = <&clks IMX6SLL_CLK_PWM2>, <&clks IMX6SLL_CLK_PWM2>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; }; pwm3: pwm@2088000 { @@ -341,7 +341,7 @@ clocks = <&clks IMX6SLL_CLK_PWM3>, <&clks IMX6SLL_CLK_PWM3>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; }; pwm4: pwm@208c000 { @@ -351,7 +351,7 @@ clocks = <&clks IMX6SLL_CLK_PWM4>, <&clks IMX6SLL_CLK_PWM4>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; }; gpt1: timer@2098000 { |