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authorFabio Estevam <festevam@gmail.com>2020-02-19 10:07:12 -0300
committerShawn Guo <shawnguo@kernel.org>2020-03-10 14:14:30 +0800
commit8cdff3241f63da30b0228d8719cf04b72d671f7d (patch)
tree260d25fc08ac28dfa03e6b4bc84ec527b72163d6 /arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
parent95d014c812f10df5c8f542d04146e59d169c6dde (diff)
ARM: dts: imx6sx-softing-vining-2000: Enable PCI support
Add PCI support. Since this board has an active high PCI reset line, pass the 'reset-gpio-active-high' property. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-softing-vining-2000.dts')
-rw-r--r--arch/arm/boot/dts/imx6sx-softing-vining-2000.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts b/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
index 61c7e723ad5d..6b728b03f1f2 100644
--- a/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
+++ b/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
@@ -352,6 +352,12 @@
>;
};
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6SX_PAD_NAND_DATA02__GPIO4_IO_6 0x10b0
+ >;
+ };
+
pinctrl_pwm1: pwm1grp-1 {
fsl,pins = <
/* blue LED */
@@ -490,6 +496,14 @@
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>;
+ reset-gpio-active-high;
+ status = "okay";
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;