summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx7-colibri.dtsi
diff options
context:
space:
mode:
authorStefan Agner <stefan@agner.ch>2017-12-19 19:10:31 +0100
committerShawn Guo <shawnguo@kernel.org>2017-12-26 16:15:44 +0800
commite95723b5ecaa21b30de3c786d3e8a34e15632beb (patch)
tree5c388fc6f933b576ae7c12b4c40ba33db0f1bda8 /arch/arm/boot/dts/imx7-colibri.dtsi
parent7e81cb3d9cf5a7cc56606a63ca6f100bb3f1f5de (diff)
ARM: dts: imx7-colibri: make sure multiplexed pins are not active
The Colibri pins PWM<A> and <D> are multiplexed on the module, make sure the secondary SoC pin is not active. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7-colibri.dtsi')
-rw-r--r--arch/arm/boot/dts/imx7-colibri.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 60ea7557d8c9..dae6b561145b 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -507,6 +507,7 @@
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79
+ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4
>;
};
@@ -525,6 +526,7 @@
pinctrl_pwm4: pwm4-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79
+ MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4
>;
};