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authorFrank Li <Frank.Li@freescale.com>2016-01-05 11:17:14 -0600
committerShawn Guo <shawnguo@kernel.org>2016-02-29 16:14:31 +0800
commitecea9fec0f51a371e93d1b7e8a0376809d2d4e47 (patch)
tree69232b78320646ab7f60e0bc9dea59e6282a97bb /arch/arm/boot/dts/imx7d.dtsi
parent26cefdd15db1ebdcc564a23f21e3359342f71bde (diff)
ARM: dts: imx7d: add arch timer
Since uboot v2016.01-rc2, which supported basic psci for i.mx7d. So imx7d's second core can be enabled by psci. Without arch timer, every timer event will be boardcasted to each core. arch timer has local timer irq for each core. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7d.dtsi')
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 25ad30978740..b5a50e0e7ff1 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -119,6 +119,15 @@
clock-output-names = "osc";
};
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&intc>;
+ };
+
etr@30086000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x30086000 0x1000>;