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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-07-23 20:07:07 -0400
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-10-10 19:52:17 -0400
commit6120ac2328a1c62f2a0a56ba78befdad2661a3e3 (patch)
tree2b6010ae0d3a0e37e41871a138931b7aa4b29e08 /arch/arm/boot/dts/keystone.dts
parentfc20ffe1213beb09bb7fb6687b404fe48183a55e (diff)
ARM: dts: keystone: Add i2c device nodes
Keystone2 based SOCs supports 3 instances of i2c controllers. Add the device nodes for them. The i2c0 child device AT24C1024 EEPROM node is also added. When different board variants are added in future, it can be moved to the supported boards from common SOC file. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/keystone.dts')
-rw-r--r--arch/arm/boot/dts/keystone.dts30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts
index 6c5f92a470e3..ee9195404f6e 100644
--- a/arch/arm/boot/dts/keystone.dts
+++ b/arch/arm/boot/dts/keystone.dts
@@ -122,5 +122,35 @@
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
};
+ i2c0: i2c@2530000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x02530000 0x400>;
+ clock-frequency = <100000>;
+ clocks = <&clki2c>;
+ interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dtt@50 {
+ compatible = "at,24c1024";
+ reg = <0x50>;
+ };
+ };
+
+ i2c1: i2c@2530400 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x02530400 0x400>;
+ clock-frequency = <100000>;
+ clocks = <&clki2c>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ i2c2: i2c@2530800 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x02530800 0x400>;
+ clock-frequency = <100000>;
+ clocks = <&clki2c>;
+ interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
+ };
};
};