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authorLi Yang <leoyang.li@nxp.com>2021-10-12 18:58:09 -0500
committerShawn Guo <shawnguo@kernel.org>2021-10-15 11:16:21 +0800
commitca8a261617c7ff478335de071cd26cb8a82f845a (patch)
tree63519c33caec9078332f6f8b20a2ac36f7716b39 /arch/arm/boot/dts/ls1021a.dtsi
parent113dc42b03e352e4d8b3ff9425e26aa52ae61832 (diff)
ARM: dts: ls1021a: change dma channels order to match schema
Although the ordering of DMA channels was not relevant in the txt binding, it is defined as ordered in the converted yaml schema. Update the dts to match the order. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 77f983b589fa..960de957f0b4 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -395,8 +395,8 @@
reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 39>, <&edma0 1 38>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 38>, <&edma0 1 39>;
status = "disabled";
};
@@ -407,8 +407,8 @@
reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 37>, <&edma0 1 36>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 36>, <&edma0 1 37>;
status = "disabled";
};
@@ -419,8 +419,8 @@
reg = <0x0 0x21a0000 0x0 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 35>, <&edma0 1 34>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 34>, <&edma0 1 35>;
status = "disabled";
};