ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

1 files changed, 0 insertions, 177 deletions

diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
deleted file mode 100644
index 352a39357810..000000000000
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ /dev/null
@@ -1,177 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- */
-
-#include <dt-bindings/clock/marvell,pxa910.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		i2c0 = &twsi1;
-		i2c1 = &twsi2;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		L2: l2-cache {
-			compatible = "marvell,tauros2-cache";
-			marvell,tauros2-cache-features = <0x3>;
-		};
-
-		axi@d4200000 {	/* AXI */
-			compatible = "mrvl,axi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4200000 0x00200000>;
-			ranges;
-
-			intc: interrupt-controller@d4282000 {
-				compatible = "mrvl,mmp-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-				reg = <0xd4282000 0x1000>;
-				mrvl,intc-nr-irqs = <64>;
-			};
-
-		};
-
-		apb@d4000000 {	/* APB */
-			compatible = "mrvl,apb-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4000000 0x00200000>;
-			ranges;
-
-			timer0: timer@d4014000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4014000 0x100>;
-				interrupts = <13>;
-			};
-
-			timer1: timer@d4016000 {
-				compatible = "mrvl,mmp-timer";
-				reg = <0xd4016000 0x100>;
-				interrupts = <29>;
-				status = "disabled";
-			};
-
-			uart1: serial@d4017000 {
-				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
-				reg = <0xd4017000 0x1000>;
-				reg-shift = <2>;
-				interrupts = <27>;
-				clocks = <&soc_clocks PXA910_CLK_UART0>;
-				resets = <&soc_clocks PXA910_CLK_UART0>;
-				status = "disabled";
-			};
-
-			uart2: serial@d4018000 {
-				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
-				reg = <0xd4018000 0x1000>;
-				reg-shift = <2>;
-				interrupts = <28>;
-				clocks = <&soc_clocks PXA910_CLK_UART1>;
-				resets = <&soc_clocks PXA910_CLK_UART1>;
-				status = "disabled";
-			};
-
-			uart3: serial@d4036000 {
-				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
-				reg = <0xd4036000 0x1000>;
-				reg-shift = <2>;
-				interrupts = <59>;
-				clocks = <&soc_clocks PXA910_CLK_UART2>;
-				resets = <&soc_clocks PXA910_CLK_UART2>;
-				status = "disabled";
-			};
-
-			gpio@d4019000 {
-				compatible = "marvell,mmp-gpio";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0xd4019000 0x1000>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupts = <49>;
-				interrupt-names = "gpio_mux";
-				clocks = <&soc_clocks PXA910_CLK_GPIO>;
-				resets = <&soc_clocks PXA910_CLK_GPIO>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				ranges;
-
-				gcb0: gpio@d4019000 {
-					reg = <0xd4019000 0x4>;
-				};
-
-				gcb1: gpio@d4019004 {
-					reg = <0xd4019004 0x4>;
-				};
-
-				gcb2: gpio@d4019008 {
-					reg = <0xd4019008 0x4>;
-				};
-
-				gcb3: gpio@d4019100 {
-					reg = <0xd4019100 0x4>;
-				};
-			};
-
-			twsi1: i2c@d4011000 {
-				compatible = "mrvl,mmp-twsi";
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg = <0xd4011000 0x1000>;
-				interrupts = <7>;
-				clocks = <&soc_clocks PXA910_CLK_TWSI0>;
-				resets = <&soc_clocks PXA910_CLK_TWSI0>;
-				mrvl,i2c-fast-mode;
-				status = "disabled";
-			};
-
-			twsi2: i2c@d4037000 {
-				compatible = "mrvl,mmp-twsi";
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg = <0xd4037000 0x1000>;
-				interrupts = <54>;
-				clocks = <&soc_clocks PXA910_CLK_TWSI1>;
-				resets = <&soc_clocks PXA910_CLK_TWSI1>;
-				status = "disabled";
-			};
-
-			rtc: rtc@d4010000 {
-				compatible = "mrvl,mmp-rtc";
-				reg = <0xd4010000 0x1000>;
-				interrupts = <5>, <6>;
-				interrupt-names = "rtc 1Hz", "rtc alarm";
-				clocks = <&soc_clocks PXA910_CLK_RTC>;
-				resets = <&soc_clocks PXA910_CLK_RTC>;
-				status = "disabled";
-			};
-		};
-
-		soc_clocks: clocks{
-			compatible = "marvell,pxa910-clock";
-			reg = <0xd4050000 0x1000>,
-			      <0xd4282800 0x400>,
-			      <0xd4015000 0x1000>,
-			      <0xd403b000 0x1000>;
-			reg-names = "mpmu", "apmu", "apbc", "apbcp";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-		};
-	};
-};