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authorSimon Horman <horms+renesas@verge.net.au>2013-11-26 16:47:11 +0900
committerSimon Horman <horms+renesas@verge.net.au>2013-12-10 17:27:24 +0900
commit3c3f6ad350bbeccaba5ab54a267900dcc76b9dd2 (patch)
tree3333a8b6224428ecb11229b8f0403f40a8a345c5 /arch/arm/boot/dts/r8a7779.dtsi
parent11ef0340a8cdf9db9a5c49298f361258d090fefb (diff)
ARM: shmobile: r8a7779: add HSPI support to DTSI
Based on work for the r8a7778 SoC by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7779.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 8284715feec2..d0561d4c7c46 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -42,6 +42,12 @@
};
};
+ aliases {
+ spi0 = &hspi0;
+ spi1 = &hspi1;
+ spi2 = &hspi2;
+ };
+
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
@@ -248,4 +254,28 @@
cap-sdio-irq;
status = "disabled";
};
+
+ hspi0: spi@fffc7000 {
+ compatible = "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+ interrupt-controller = <&gic>;
+ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ hspi1: spi@fffc8000 {
+ compatible = "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+ interrupt-controller = <&gic>;
+ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ hspi2: spi@fffc6000 {
+ compatible = "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+ interrupt-controller = <&gic>;
+ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
};