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authorSimon Horman <horms+renesas@verge.net.au>2013-01-29 14:21:46 +0900
committerSimon Horman <horms+renesas@verge.net.au>2013-03-13 02:13:18 +0900
commitc58a1545e39ed1ff54dd2c167d3d25ae62c0dbd3 (patch)
tree6154acc9a50fe7112b3be8479794dc70fc541aa1 /arch/arm/boot/dts/r8a7779.dtsi
parentdf2ddd7b9b781f0aee7fc90e6bed21e62ebf7564 (diff)
ARM: mach-shmobile: r8a7779: Allow initialisation of GIC by DT
This allows the GIC interrupt controller of the r8a7779 SoC to be initialised using a flattened device tree blob. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- v3 * Fix copy-paste error and use unique reg values for each CPU v2 As suggested by Mark Rutland * Add reg and device_type to cpus * Remove #address-cells from gic
Diffstat (limited to 'arch/arm/boot/dts/r8a7779.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
new file mode 100644
index 000000000000..8c6d52cee6c6
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -0,0 +1,50 @@
+/*
+ * Device Tree Source for Renesas r8a7740
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Simon Horman
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "renesas,r8a7779";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <2>;
+ };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <3>;
+ };
+ };
+
+ gic: interrupt-controller@f0001000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0xf0001000 0x1000>,
+ <0xf0000100 0x100>;
+ };
+};