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| author | Olof Johansson <olof@lixom.net> | 2019-04-28 12:59:37 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-04-28 12:59:37 -0700 |
| commit | bcb84a1097ca5fc54d14f923d659eb21ffd38490 (patch) | |
| tree | a1f97069a1110e9fc1b5e9c4536cb7abfc774d63 /arch/arm/boot/dts/rk3288-evb-act8846.dts | |
| parent | ad88400145a23e063615226f5c69e74945fe17ea (diff) | |
| parent | 356150e86d75653d1f679c6ef583144b26d0a686 (diff) | |
Merge tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Much love for rk3288 in general (power coefficients for the scheduler)
and veyron chromeos devices in particular (regulators, suspend, cleanups)
and bulk conversion of the remaining gpios to the helper constants denoting
the iomux.
* tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: vdd_gpu off in suspend for rk3288-veyron
ARM: dts: rockchip: vcc33_ccd off in suspend for rk3288-veyron-chromebook
ARM: dts: rockchip: Add DDR retention/poweroff to rk3288-veyron hogs
ARM: dts: rockchip: Add dynamic-power-coefficient for rk3288
ARM: dts: rockchip: bulk convert gpios to their constant counterparts
ARM: dts: rockchip: Add BT_EN to the power sequence for veyron
ARM: dts: rockchip: Remove unnecessary setting of UART0 SCLK rate on veyron
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-evb-act8846.dts')
| -rw-r--r-- | arch/arm/boot/dts/rk3288-evb-act8846.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts index 6592c809e2a5..80080767c365 100644 --- a/arch/arm/boot/dts/rk3288-evb-act8846.dts +++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts @@ -175,13 +175,13 @@ &pinctrl { lcd { lcd_en: lcd-en { - rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; wifi { wifi_pwr: wifi-pwr { - rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; |