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authorThor Thayer <tthayer@opensource.altera.com>2016-06-02 17:52:26 +0000
committerDinh Nguyen <dinguyen@opensource.altera.com>2016-10-18 22:18:11 -0500
commit5984be047d35379012184310cafcac9efac366b8 (patch)
treec18d0434499bd120d5149bf5b18d3b17bf60857e /arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
parentf2d6f8f8178142519c5b576582bec5cf9eabbaaf (diff)
ARM: dts: socfpga: Add Devkit A10-SR fields for Arria10
Add the Altera Arria10 System Resource node. This is a Multi-Function device with GPIO expander support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10_socdk.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10_socdk.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index 8e3a4adc389f..9f97756693f4 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -75,6 +75,27 @@
status = "okay";
};
+&spi1 {
+ status = "okay";
+
+ resource-manager@0 {
+ compatible = "altr,a10sr";
+ reg = <0>;
+ spi-max-frequency = <100000>;
+ /* low-level active IRQ at GPIO1_5 */
+ interrupt-parent = <&portb>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ a10sr_gpio: gpio-controller {
+ compatible = "altr,a10sr-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+};
+
&i2c1 {
speed-mode = <0>;
status = "okay";