diff options
| author | Stephan Gerhold <stephan@gerhold.net> | 2019-11-25 18:04:28 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-12-09 14:45:01 +0100 |
| commit | bef475b03d9bf20919ba66916b0c82a374722b7e (patch) | |
| tree | 3574bf5ca48e0e0f0d33405ca9ef2832aae2f0eb /arch/arm/boot/dts/ste-dbx5x0.dtsi | |
| parent | 5195887a6fe0d95293d1c3f8c0f2456363bec0a3 (diff) | |
ARM: dts: ux500: Remove ux500_ prefix from ux500_serial* labels
ux500_serial{0,1,2} are the only labels with ux500_ prefix in
ste-dbx5x0.dtsi, the other labels (gpio0, msp, ...) do not use
any prefix. Remove it for consistency.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125170428.76069-4-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-dbx5x0.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ste-dbx5x0.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 9a840a210fbb..d635fd85a449 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -25,9 +25,9 @@ spi1 = &spi1; spi2 = &spi2; spi3 = &spi3; - serial0 = &ux500_serial0; - serial1 = &ux500_serial1; - serial2 = &ux500_serial2; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; }; chosen { @@ -843,7 +843,7 @@ status = "disabled"; }; - ux500_serial0: uart@80120000 { + serial0: uart@80120000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80120000 0x1000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -858,7 +858,7 @@ status = "disabled"; }; - ux500_serial1: uart@80121000 { + serial1: uart@80121000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80121000 0x1000>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -873,7 +873,7 @@ status = "disabled"; }; - ux500_serial2: uart@80007000 { + serial2: uart@80007000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80007000 0x1000>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |