diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-06-26 10:05:52 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2020-07-07 14:45:39 +0200 |
| commit | f2b56a6b2b071e0c3b757c0179248a1b6bebab10 (patch) | |
| tree | fe4e23a22c4415cd51e9fd085fcfb8509da08598 /arch/arm/boot/dts/ste-dbx5x0.dtsi | |
| parent | 206c01d1ec14b5e238132ce7c8891ba02c3328c8 (diff) | |
ARM: dts: ste: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200626080552.3627-1-krzk@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-dbx5x0.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ste-dbx5x0.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 3e10da3f8fd3..05fd544b06c1 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -260,7 +260,7 @@ reg = <0x80150000 0x2000>; }; - L2: l2-cache { + L2: cache-controller { compatible = "arm,pl310-cache"; reg = <0xa0412000 0x1000>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; |