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author | Josh Poimboeuf <jpoimboe@redhat.com> | 2019-11-06 20:26:46 -0600 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2019-11-07 16:06:27 +0100 |
commit | 012206a822a8b6ac09125bfaa210a95b9eb8f1c1 (patch) | |
tree | c39661afdf432948d6a8dcd7d8677f6aa618cdac /arch/arm/boot/dts/stm32mp157a-dk1.dts | |
parent | 7f00cc8d4a51074eb0ad4c3f16c15757b1ddfb7d (diff) |
x86/speculation/taa: Fix printing of TAA_MSG_SMT on IBRS_ALL CPUs
For new IBRS_ALL CPUs, the Enhanced IBRS check at the beginning of
cpu_bugs_smt_update() causes the function to return early, unintentionally
skipping the MDS and TAA logic.
This is not a problem for MDS, because there appears to be no overlap
between IBRS_ALL and MDS-affected CPUs. So the MDS mitigation would be
disabled and nothing would need to be done in this function anyway.
But for TAA, the TAA_MSG_SMT string will never get printed on Cascade
Lake and newer.
The check is superfluous anyway: when 'spectre_v2_enabled' is
SPECTRE_V2_IBRS_ENHANCED, 'spectre_v2_user' is always
SPECTRE_V2_USER_NONE, and so the 'spectre_v2_user' switch statement
handles it appropriately by doing nothing. So just remove the check.
Fixes: 1b42f017415b ("x86/speculation/taa: Add mitigation for TSX Async Abort")
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Tyler Hicks <tyhicks@canonical.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157a-dk1.dts')
0 files changed, 0 insertions, 0 deletions