Merge tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Pull "Allwinner DT changes for 4.11" from Maxime Ripard:

The usual chunk of DT changes, most notably:
  - Support for the H2+ and the V3s
  - CPUFreq support for the A33
  - SPDIF support for the A31 and H3
  - New boards: Beelink X2, Lichee Pi One, Lichee Pi Zero,
    Orange Pi Zero

* tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (42 commits)
  ARM: dts: sun8i-h3: Add SPDIF to the Beelink X2
  ARM: dts: sun8i-h3: Add the SPDIF block to the H3
  ARM: dts: sun8i-h3: Add SPDIF TX pin to the H3
  ARM: dts: sun8i-h3: Add dts for the Beelink X2 STB
  ARM: sun8i: sina33: Enable display
  ARM: sun8i: a23/a33: Add the oscillators accuracy
  ARM: sun8i: a23/a33: Enable the real LOSC and use it
  ARM: dts: sunxi: add support for Lichee Pi Zero board
  ARM: dts: sunxi: add dtsi file for V3s SoC
  ARM: dts: sun6i: sina31s: Enable USB OTG controller in peripheral mode
  ARM: dts: sun8i: reference-design: use AXP223 DTSI
  ARM: dts: sun8i: parrot: use AXP223 DTSI
  ARM: dts: sun8i: sina33: use AXP223 DTSI
  ARM: dts: sun8i: a33-olinuxino: use AXP223 DTSI
  ARM: dts: add DTSI for AXP223
  dt-bindings: power: axp20x-usb: add axp223 compatible
  ARM: dts: sun7i: Add wifi dt node on Banana Pro
  ARM: dts: sun6i: Add SPDIF to the Mele I7
  devicetree: bindings: Add vendor prefix for Shenzhen Xunlong Software
  ARM: dts: sun8i-h3: orange-pi-pc: Enable audio codec
  ...

1 files changed, 18 insertions, 6 deletions

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 58055c39901f..9f9bc2c5ac97 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -84,7 +84,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <0>;
@@ -106,14 +106,16 @@
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <24000000>;
+			clock-accuracy = <50000>;
 			clock-output-names = "osc24M";
 		};
 
-		osc32k: osc32k_clk {
+		ext_osc32k: ext_osc32k_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <32768>;
-			clock-output-names = "osc32k";
+			clock-accuracy = <50000>;
+			clock-output-names = "ext-osc32k";
 		};
 	};
 
@@ -256,7 +258,7 @@
 
 		ccu: clock@01c20000 {
 			reg = <0x01c20000 0x400>;
-			clocks = <&osc24M>, <&osc32k>;
+			clocks = <&osc24M>, <&rtc 0>;
 			clock-names = "hosc", "losc";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
@@ -266,7 +268,7 @@
 			/* compatible gets set in SoC specific dtsi file */
 			reg = <0x01c20800 0x400>;
 			/* interrupts get set in SoC specific dtsi file */
-			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
 			clock-names = "apb", "hosc", "losc";
 			gpio-controller;
 			interrupt-controller;
@@ -293,6 +295,7 @@
 				       "PF3", "PF4", "PF5";
 				function = "mmc0";
 				drive-strength = <30>;
+				bias-pull-up;
 			};
 
 			mmc1_pins_a: mmc1@0 {
@@ -300,6 +303,7 @@
 				       "PG3", "PG4", "PG5";
 				function = "mmc1";
 				drive-strength = <30>;
+				bias-pull-up;
 			};
 
 			mmc2_8bit_pins: mmc2_8bit {
@@ -309,6 +313,7 @@
 				       "PC15", "PC16";
 				function = "mmc2";
 				drive-strength = <30>;
+				bias-pull-up;
 			};
 
 			pwm0_pins: pwm0 {
@@ -483,6 +488,9 @@
 			reg = <0x01f00000 0x54>;
 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			clock-output-names = "osc32k";
+			clocks = <&ext_osc32k>;
+			#clock-cells = <1>;
 		};
 
 		nmi_intc: interrupt-controller@01f00c0c {
@@ -535,6 +543,10 @@
 				compatible = "allwinner,sun6i-a31-clock-reset";
 				#reset-cells = <1>;
 			};
+
+			codec_analog: codec-analog {
+				compatible = "allwinner,sun8i-a23-codec-analog";
+			};
 		};
 
 		cpucfg@01f01c00 {
@@ -557,7 +569,7 @@
 			compatible = "allwinner,sun8i-a23-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
 			clock-names = "apb", "hosc", "losc";
 			resets = <&apb0_rst 0>;
 			gpio-controller;