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authorChen-Yu Tsai <wens@csie.org>2016-06-02 15:50:10 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-07-04 21:17:54 +0200
commit966c11a3b5e47689b7894c4e87548e9f99b1532a (patch)
tree30d3b998aae185e342432d04e9641a411cf37451 /arch/arm/boot/dts/sun8i-h3.dtsi
parent2bcb2b1b95e636bf8222470cf9e4461fd4566789 (diff)
ARM: dts: sun8i-h3: Add uart1 pinmux setting
Add uart1 pins for 4 pin (RX/TX/RTS/CTS) mode. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-h3.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 52558046dbaf..3c37f7e2b079 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -540,6 +540,13 @@
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+
+ uart1_pins_a: uart1@0 {
+ allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+ allwinner,function = "uart1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
ahb_rst: reset@01c202c0 {