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authorMasahiro Yamada <yamada.masahiro@socionext.com>2020-01-16 21:50:44 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2020-01-18 00:56:09 +0900
commit37f3e0096f716b06338a4771633b32b8e2a36f7f (patch)
tree96e3a2aa19c51f1fcc400d167df8d8e39996f798 /arch/arm/boot/dts/uniphier-pxs2.dtsi
parent38dbf2de46acb4e0965ba7719d2a8ee1bc80181f (diff)
ARM: dts: uniphier: add reset-names to NAND controller node
The Denali NAND controller IP has separate reset control for the controller core and registers. Add the reset-names, and one more phandle accordingly. This is the approved DT-binding. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 4eddbb8d7fca..13b0d4a7741f 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -773,7 +773,8 @@
pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
- resets = <&sys_rst 2>;
+ reset-names = "nand", "reg";
+ resets = <&sys_rst 2>, <&sys_rst 2>;
};
};
};