diff options
| author | Lionel Debieve <lionel.debieve@foss.st.com> | 2024-02-19 12:37:43 +0100 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-02-29 10:14:07 +0100 |
| commit | b40a53f062c503dec0515994f2b1a39da046ad92 (patch) | |
| tree | 5545d228a3a1119f35611f646f0bb071ed6c94b6 /arch/arm/boot/dts | |
| parent | db4fc2c79c533986795a7750e9a12caf9d620b48 (diff) | |
ARM: dts: stm32: add CRC on stm32mp131
The Cyclic redundancy check calculation unit (CRC) peripheral
offers a CRC-based operation (CRC32/CRC32C) used to verify data
transmission or storage integrity.
This peripheral is integrated in stm32mp131 and can be default
enabled.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp131.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index b04d24c939c3..3900f32da797 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -1315,6 +1315,13 @@ status = "disabled"; }; + crc1: crc@58009000 { + compatible = "st,stm32f7-crc"; + reg = <0x58009000 0x400>; + clocks = <&rcc CRC1>; + status = "disabled"; + }; + usbh_ohci: usb@5800c000 { compatible = "generic-ohci"; reg = <0x5800c000 0x1000>; |