diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-10-20 09:18:31 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-10-20 09:18:31 -0700 |
commit | 709ebe6dff50405ae83551578bc08c0f78b05158 (patch) | |
tree | 8d4343b429771129ad5820ccde63b2ba22bb116f /arch/arm/include/debug/8250.S | |
parent | b32649b863623d89fec83aa27d19c28715c4fae3 (diff) | |
parent | adc5f7029376049873289be305d507022281b8dd (diff) |
Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:
- handle inexact watchpoint addresses (Douglas Anderson)
- decompressor serial debug cleanups (Linus Walleij)
- update L2 cache prefetch bits (Guillaume Tucker)
- add text offset and malloc size to the decompressor kexec data
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: add malloc size to decompressor kexec size structure
ARM: add TEXT_OFFSET to decompressor kexec image structure
ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT values
ARM: 9010/1: uncompress: Print the location of appended DTB
ARM: 9009/1: uncompress: Enable debug in head.S
ARM: 9008/1: uncompress: Drop excess whitespace print
ARM: 9006/1: uncompress: Wait for ready and busy in debug prints
ARM: 9005/1: debug: Select flow control for all debug UARTs
ARM: 9004/1: debug: Split waituart to CTS and TXRDY
ARM: 9003/1: uncompress: Delete unused debug macros
ARM: 8997/2: hw_breakpoint: Handle inexact watchpoint addresses
Diffstat (limited to 'arch/arm/include/debug/8250.S')
-rw-r--r-- | arch/arm/include/debug/8250.S | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S index e4a036f082c2..e3692a37cede 100644 --- a/arch/arm/include/debug/8250.S +++ b/arch/arm/include/debug/8250.S @@ -45,10 +45,11 @@ bne 1002b .endm - .macro waituart,rd,rx -#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx 1001: load \rd, [\rx, #UART_MSR << UART_SHIFT] tst \rd, #UART_MSR_CTS beq 1001b -#endif .endm |