diff options
| author | Marc Zyngier <marc.zyngier@arm.com> | 2019-03-11 15:38:10 +0000 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2019-03-11 15:38:10 +0000 |
| commit | b41fdc4a7bf9045e4871c5b15905ea732ffd044f (patch) | |
| tree | 4cdbaefe72458c801e026bed3b1a5516083e5ddc /arch/arm/mach-cns3xxx/core.c | |
| parent | 7d3a5eb78e3614b025389d2cd89d6d85e91f5549 (diff) | |
irqchip/gic: Drop support for secondary GIC in non-DT systems
We do not have any in-tree platform with this pathological setup,
and only a single system (Cavium's cns3xxx) isn't DT aware.
Let's drop the secondary GIC support for now, until we remove
the above horror altogether.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/mach-cns3xxx/core.c')
| -rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 7d5a44a06648..f676592d8402 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -90,7 +90,7 @@ void __init cns3xxx_map_io(void) /* used by entry-macro.S */ void __init cns3xxx_init_irq(void) { - gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), + gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); } |