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authorKukjin Kim <kgene.kim@samsung.com>2013-12-19 04:19:59 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-12-19 05:21:17 +0900
commit9c9239afe31f67d137ba6c45b244b509c2090567 (patch)
treee832d8ff75bf0f74f0a073f84c37158943b05463 /arch/arm/mach-exynos/include
parent7d8f159188410557630a7270efe3e14a1a305c2e (diff)
ARM: EXYNOS: local definitions for pm.c into mach-exynos dir
Some of definitions in the regs-clock.h are used only for pm.c, so this moves them into the file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include')
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 855f1b2c1fdc..5acc06e4bca8 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -18,25 +18,6 @@
#define EXYNOS_CLKREG(x) (S5P_VA_CMU + (x))
-#define EXYNOS4_EPLL_LOCK EXYNOS_CLKREG(0x0C010)
-#define EXYNOS4_VPLL_LOCK EXYNOS_CLKREG(0x0C020)
-
-#define EXYNOS4_EPLL_CON0 EXYNOS_CLKREG(0x0C110)
-#define EXYNOS4_EPLL_CON1 EXYNOS_CLKREG(0x0C114)
-#define EXYNOS4_VPLL_CON0 EXYNOS_CLKREG(0x0C120)
-#define EXYNOS4_VPLL_CON1 EXYNOS_CLKREG(0x0C124)
-
-#define EXYNOS4_CLKSRC_MASK_TOP EXYNOS_CLKREG(0x0C310)
-#define EXYNOS4_CLKSRC_MASK_CAM EXYNOS_CLKREG(0x0C320)
-#define EXYNOS4_CLKSRC_MASK_TV EXYNOS_CLKREG(0x0C324)
-#define EXYNOS4_CLKSRC_MASK_LCD0 EXYNOS_CLKREG(0x0C334)
-#define EXYNOS4_CLKSRC_MASK_MAUDIO EXYNOS_CLKREG(0x0C33C)
-#define EXYNOS4_CLKSRC_MASK_FSYS EXYNOS_CLKREG(0x0C340)
-#define EXYNOS4_CLKSRC_MASK_PERIL0 EXYNOS_CLKREG(0x0C350)
-#define EXYNOS4_CLKSRC_MASK_PERIL1 EXYNOS_CLKREG(0x0C354)
-
-#define EXYNOS4_CLKSRC_MASK_DMC EXYNOS_CLKREG(0x10300)
-
#define EXYNOS4_CLKSRC_CPU EXYNOS_CLKREG(0x14200)
#define EXYNOS4_CLKMUX_STATCPU EXYNOS_CLKREG(0x14400)
@@ -45,16 +26,9 @@
#define EXYNOS4_CLKDIV_STATCPU EXYNOS_CLKREG(0x14600)
#define EXYNOS4_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x14604)
-#define EXYNOS4_EPLLCON0_LOCKED_SHIFT (29)
-#define EXYNOS4_VPLLCON0_LOCKED_SHIFT (29)
-
#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
-/* Only for EXYNOS4210 */
-
-#define EXYNOS4210_CLKSRC_MASK_LCD1 EXYNOS_CLKREG(0x0C338)
-
/* For EXYNOS5250 */
#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)