diff options
| author | Pankaj Dubey <pankaj.dubey@samsung.com> | 2014-07-19 03:43:22 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-07-23 08:20:30 +0900 |
| commit | 2e94ac42898f84d76e3c21dd91bcd1c51c920dff (patch) | |
| tree | 099ba810bbcaea5849e6c6d9430549631b66c724 /arch/arm/mach-exynos/mcpm-exynos.c | |
| parent | 20fe6f98fae6968b9d6067d49d9ecae9d9593b37 (diff) | |
ARM: EXYNOS: Refactored code for using PMU address via DT
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 based SoC.
Also as we have removed static mappings from "regs-pmu.h" it does
not need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/mcpm-exynos.c')
| -rw-r--r-- | arch/arm/mach-exynos/mcpm-exynos.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 9315ba91c1fb..70e8ccd94668 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -55,7 +55,7 @@ "dsb\n\t" \ "ldmfd sp!, {fp, ip}" \ : \ - : "Ir" (S5P_INFORM0) \ + : "Ir" (pmu_base_addr + S5P_INFORM0) \ : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ "r9", "r10", "lr", "memory") @@ -337,7 +337,7 @@ static int __init exynos_mcpm_init(void) * To increase the stability of KFC reset we need to program * the PMU SPARE3 register */ - __raw_writel(EXYNOS5420_SWRESET_KFC_SEL, S5P_PMU_SPARE3); + pmu_raw_writel(EXYNOS5420_SWRESET_KFC_SEL, S5P_PMU_SPARE3); exynos_mcpm_usage_count_init(); @@ -366,11 +366,11 @@ static int __init exynos_mcpm_init(void) * turned on before the first man is powered up. */ for (i = 0; i < EXYNOS5420_NR_CLUSTERS; i++) { - value = __raw_readl(EXYNOS_COMMON_OPTION(i)); + value = pmu_raw_readl(EXYNOS_COMMON_OPTION(i)); value |= EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN | EXYNOS5420_USE_ARM_CORE_DOWN_STATE | EXYNOS5420_USE_L2_COMMON_UP_STATE; - __raw_writel(value, EXYNOS_COMMON_OPTION(i)); + pmu_raw_writel(value, EXYNOS_COMMON_OPTION(i)); } /* |