diff options
| author | Marc Zyngier <marc.zyngier@arm.com> | 2011-09-08 13:15:22 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-09-14 11:14:50 +0200 |
| commit | 06853ae475e1386d6d11d139ba7bf2c97b3d1768 (patch) | |
| tree | 601470fcced6d92d29017b6efefbb4bdc2008a0f /arch/arm/mach-exynos/platsmp.c | |
| parent | a17257322f5e6ca376c15908b55423369274fcad (diff) | |
ARM: SoC: convert Exynos4 to SMP operations
Convert Exynos4 to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-exynos/platsmp.c')
| -rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 36c3984aaa47..3fad8ad3f92c 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -32,6 +32,8 @@ #include <plat/cpu.h> +#include "common.h" + extern void exynos4_secondary_startup(void); #define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ @@ -64,7 +66,7 @@ static void __iomem *scu_base_addr(void) static DEFINE_SPINLOCK(boot_lock); -void __cpuinit platform_secondary_init(unsigned int cpu) +static void __cpuinit exynos_secondary_init(unsigned int cpu) { /* * if any interrupts are already enabled for the primary @@ -86,7 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) spin_unlock(&boot_lock); } -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; @@ -161,7 +163,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * which may be present or become present in the system. */ -void __init smp_init_cpus(void) +static void __init exynos_smp_init_cpus(void) { void __iomem *scu_base = scu_base_addr(); unsigned int i, ncores; @@ -184,7 +186,7 @@ void __init smp_init_cpus(void) set_smp_cross_call(gic_raise_softirq); } -void __init platform_smp_prepare_cpus(unsigned int max_cpus) +static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) { if (!soc_is_exynos5250()) scu_enable(scu_base_addr()); @@ -198,3 +200,13 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) __raw_writel(virt_to_phys(exynos4_secondary_startup), CPU1_BOOT_REG); } + +struct smp_operations exynos_smp_ops __initdata = { + .smp_init_cpus = exynos_smp_init_cpus, + .smp_prepare_cpus = exynos_smp_prepare_cpus, + .smp_secondary_init = exynos_secondary_init, + .smp_boot_secondary = exynos_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = exynos_cpu_die, +#endif +}; |