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| author | Thomas Gleixner <tglx@linutronix.de> | 2019-11-15 10:30:50 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-11-15 10:30:50 +0100 |
| commit | ac94be498f84f7327533b62faca4c3da64434904 (patch) | |
| tree | 63893f37afb67cd400bf60ec16a35440d16f2a90 /arch/arm/mach-iop32x/iq80321.h | |
| parent | dce7cd62754b5d4a6e401b8b0769ec94cf971041 (diff) | |
| parent | 8c5bd25bf42effd194d4b0b43895c42b374e620b (diff) | |
Merge branch 'linus' into x86/hyperv
Pick up upstream fixes to avoid conflicts.
Diffstat (limited to 'arch/arm/mach-iop32x/iq80321.h')
| -rw-r--r-- | arch/arm/mach-iop32x/iq80321.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-iop32x/iq80321.h b/arch/arm/mach-iop32x/iq80321.h new file mode 100644 index 000000000000..3a5d10626ea6 --- /dev/null +++ b/arch/arm/mach-iop32x/iq80321.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Intel IQ80321 evaluation board registers + */ + +#ifndef __IQ80321_H +#define __IQ80321_H + +#define IQ80321_UART 0xfe800000 /* UART #1 */ +#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ +#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ +#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ +#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ + + +#endif |