diff options
| author | Ben Dooks <ben.dooks@codethink.co.uk> | 2013-02-01 10:36:22 +0000 |
|---|---|---|
| committer | Ben Dooks <ben.dooks@codethink.co.uk> | 2013-10-19 20:46:34 +0100 |
| commit | bca028e7c2537fea9f401c20dd7b2103358b5efe (patch) | |
| tree | 40d369c9cef9376867cbba09330b1e7c8e8699c4 /arch/arm/mach-mvebu/headsmp.S | |
| parent | 50eec2fce45ed48575f1c0582b748e409da08511 (diff) | |
ARM: mvebu: support running big-endian
Add indication we can run these cores in BE mode, and ensure that the
secondary CPU is set to big-endian mode in the initialisation code as
the initial code runs little-endian.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/headsmp.S')
| -rw-r--r-- | arch/arm/mach-mvebu/headsmp.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S index 8a1b0c96e9ec..3dd80df428f7 100644 --- a/arch/arm/mach-mvebu/headsmp.S +++ b/arch/arm/mach-mvebu/headsmp.S @@ -21,12 +21,16 @@ #include <linux/linkage.h> #include <linux/init.h> +#include <asm/assembler.h> + /* * Armada XP specific entry point for secondary CPUs. * We add the CPU to the coherency fabric and then jump to secondary * startup */ ENTRY(armada_xp_secondary_startup) + ARM_BE8(setend be ) @ go BE8 if entered LE + /* Get coherency fabric base physical address */ adr r0, 1f ldr r1, [r0] |