diff options
| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2014-04-14 17:10:10 +0200 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-05-08 16:18:56 +0000 |
| commit | f713c7e7421d6945c977c8d8813e8089f925de41 (patch) | |
| tree | 3895c2af9593f7700057fd4ed7f1f2553e20ae16 /arch/arm/mach-mvebu/pmsu.c | |
| parent | 1a6bfbc339b6a2b59a8f88fa494fe70073cdb85a (diff) | |
ARM: mvebu: Allow to power down L2 cache controller in idle mode
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/pmsu.c')
| -rw-r--r-- | arch/arm/mach-mvebu/pmsu.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index a8796b832e2e..7ccf14a065b1 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -33,7 +33,12 @@ static void __iomem *pmsu_mp_base; #define PMSU_BASE_OFFSET 0x100 #define PMSU_REG_SIZE 0x1000 -#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124) +/* PMSU MP registers */ +#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124) + +/* PMSU fabric registers */ +#define L2C_NFABRIC_PM_CTL 0x4 +#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20) static struct of_device_id of_pmsu_table[] = { { .compatible = "marvell,armada-370-pmsu", }, @@ -92,4 +97,17 @@ static int __init armada_370_xp_pmsu_init(void) return ret; } +static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void) +{ + u32 reg; + + if (pmsu_mp_base == NULL) + return; + + /* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */ + reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL); + reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN; + writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL); +} + early_initcall(armada_370_xp_pmsu_init); |