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authorTero Kristo <t-kristo@ti.com>2014-10-27 08:39:26 -0700
committerTony Lindgren <tony@atomide.com>2014-10-27 08:39:26 -0700
commitc8e069d7a6a7963b44264a3c9e80aa4d13fd3093 (patch)
tree92b455b6f6db80a25521cc38476d4597efcc0d14 /arch/arm/mach-omap2/prm3xxx.c
parentf3f220f046d677b618cae9533c20ecae4d463dc8 (diff)
ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
These are not needed outside the PRM driver, so make them static and remove the prototypes from the public header. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm3xxx.c')
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 956e0ca2fb64..cb71354c503c 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -30,6 +30,11 @@
#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+static void omap3xxx_prm_ocp_barrier(void);
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+
static const struct omap_prcm_irq omap3_prcm_irqs[] = {
OMAP_PRCM_IRQ("wkup", 0, 0),
OMAP_PRCM_IRQ("io", 9, 1),
@@ -147,7 +152,7 @@ void omap3xxx_prm_dpll3_reset(void)
* MPU IRQs, and store the result into the u32 pointed to by @events.
* No return value.
*/
-void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events)
{
u32 mask, st;
@@ -166,7 +171,7 @@ void omap3xxx_prm_read_pending_irqs(unsigned long *events)
* block, to avoid race conditions after acknowledging or clearing IRQ
* bits. No return value.
*/
-void omap3xxx_prm_ocp_barrier(void)
+static void omap3xxx_prm_ocp_barrier(void)
{
omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
}
@@ -182,7 +187,7 @@ void omap3xxx_prm_ocp_barrier(void)
* returning; otherwise, spurious interrupts might occur. No return
* value.
*/
-void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
{
saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQENABLE_MPU_OFFSET);
@@ -202,7 +207,7 @@ void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
* barrier should be needed here; any pending PRM interrupts will fire
* once the writes reach the PRM. No return value.
*/
-void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
{
omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
OMAP3_PRM_IRQENABLE_MPU_OFFSET);