diff options
| author | Kevin Hilman <khilman@ti.com> | 2011-07-20 16:35:46 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-09-15 12:09:22 -0700 |
| commit | 5876c940c0dee298e38fbf47ce67c9e220b0572c (patch) | |
| tree | f4f9773abbc985e427b6c9892402064a473e9ba6 /arch/arm/mach-omap2/vc.h | |
| parent | 6a62b78d9aa6661cae1a7d30b574daf435a14c47 (diff) | |
OMAP2+: VC: more registers are per-channel starting with OMAP5
Starting with OMAP5, the following registers are per-channel and not
common to a all VC channels:
- SMPS I2C slave address
- SMPS voltage register address offset
- SMPS cmd/value register address offset
- VC channel configuration register
Move these from the channel-common struct into the per-channel struct
to support OMAP5.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc.h')
| -rw-r--r-- | arch/arm/mach-omap2/vc.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 7ed70e07becf..478bf6b432c4 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -25,9 +25,6 @@ struct voltagedomain; * struct omap_vc_common - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start - * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register @@ -36,7 +33,6 @@ struct voltagedomain; * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register - * @cfg_channel_reg: VC channel configuration register * @i2c_cfg_reg: I2C configuration register offset * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register * @i2c_mcode_mask: MCODE field mask for I2C config register @@ -47,9 +43,6 @@ struct voltagedomain; struct omap_vc_common { u32 cmd_on_mask; u32 valid; - u8 smps_sa_reg; - u8 smps_volra_reg; - u8 smps_cmdra_reg; u8 bypass_val_reg; u8 data_shift; u8 slaveaddr_shift; @@ -58,7 +51,6 @@ struct omap_vc_common { u8 cmd_onlp_shift; u8 cmd_ret_shift; u8 cmd_off_shift; - u8 cfg_channel_reg; u8 i2c_cfg_reg; u8 i2c_cfg_hsen_mask; u8 i2c_mcode_mask; @@ -82,6 +74,10 @@ struct omap_vc_common { * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register * @cmdval_reg: register for on/ret/off voltage level values for this channel + * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start + * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start + * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start + * @cfg_channel_reg: VC channel configuration register * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register * @flags: VC channel-specific flags (optional) */ @@ -100,6 +96,10 @@ struct omap_vc_channel { u32 smps_volra_mask; u32 smps_cmdra_mask; u8 cmdval_reg; + u8 smps_sa_reg; + u8 smps_volra_reg; + u8 smps_cmdra_reg; + u8 cfg_channel_reg; u8 cfg_channel_sa_shift; u8 flags; }; |