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authorAndrew Lunn <andrew@lunn.ch>2011-05-15 13:32:53 +0200
committerNicolas Pitre <nico@fluxnic.net>2011-05-16 15:42:59 -0400
commit554cdaefd1cf7bb54b209c4e68c7cec87ce442a9 (patch)
treed7dedbb0fd43466baa017499da6bb5eb533e121c /arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
parentb2f427a1088a9ad4f86855f4df1fc059bebb441f (diff)
ARM: orion5x: Refactor mpp code to use common orion platform mpp.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-orion5x/rd88f5181l-ge-setup.c')
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-ge-setup.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index c1f79fa014ed..0cc90bbfd326 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -65,28 +65,28 @@ static struct platform_device rd88f5181l_ge_nor_boot_flash = {
/*****************************************************************************
* General Setup
****************************************************************************/
-static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = {
- { 0, MPP_GPIO }, /* LED1 */
- { 1, MPP_GPIO }, /* LED5 */
- { 2, MPP_GPIO }, /* LED4 */
- { 3, MPP_GPIO }, /* LED3 */
- { 4, MPP_GPIO }, /* PCI_intA */
- { 5, MPP_GPIO }, /* RTC interrupt */
- { 6, MPP_PCI_CLK }, /* CPU PCI refclk */
- { 7, MPP_PCI_CLK }, /* PCI/PCIe refclk */
- { 8, MPP_GPIO }, /* 88e6131 interrupt */
- { 9, MPP_GPIO }, /* GE_RXERR */
- { 10, MPP_GPIO }, /* PCI_intB */
- { 11, MPP_GPIO }, /* LED2 */
- { 12, MPP_GIGE }, /* GE_TXD[4] */
- { 13, MPP_GIGE }, /* GE_TXD[5] */
- { 14, MPP_GIGE }, /* GE_TXD[6] */
- { 15, MPP_GIGE }, /* GE_TXD[7] */
- { 16, MPP_GIGE }, /* GE_RXD[4] */
- { 17, MPP_GIGE }, /* GE_RXD[5] */
- { 18, MPP_GIGE }, /* GE_RXD[6] */
- { 19, MPP_GIGE }, /* GE_RXD[7] */
- { -1 },
+static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
+ MPP0_GPIO, /* LED1 */
+ MPP1_GPIO, /* LED5 */
+ MPP2_GPIO, /* LED4 */
+ MPP3_GPIO, /* LED3 */
+ MPP4_GPIO, /* PCI_intA */
+ MPP5_GPIO, /* RTC interrupt */
+ MPP6_PCI_CLK, /* CPU PCI refclk */
+ MPP7_PCI_CLK, /* PCI/PCIe refclk */
+ MPP8_GPIO, /* 88e6131 interrupt */
+ MPP9_GPIO, /* GE_RXERR */
+ MPP10_GPIO, /* PCI_intB */
+ MPP11_GPIO, /* LED2 */
+ MPP12_GIGE, /* GE_TXD[4] */
+ MPP13_GIGE, /* GE_TXD[5] */
+ MPP14_GIGE, /* GE_TXD[6] */
+ MPP15_GIGE, /* GE_TXD[7] */
+ MPP16_GIGE, /* GE_RXD[4] */
+ MPP17_GIGE, /* GE_RXD[5] */
+ MPP18_GIGE, /* GE_RXD[6] */
+ MPP19_GIGE, /* GE_RXD[7] */
+ 0,
};
static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {