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authorChris Zhong <zyw@rock-chips.com>2015-03-22 00:04:51 +0800
committerHeiko Stuebner <heiko@sntech.de>2015-04-16 21:17:26 +0200
commitb403125d3bbf8046c1186e1a49cb17bb5551db14 (patch)
treea71540ca75dd0f65c491333046a67c67f272c29b /arch/arm/mach-rockchip/pm.h
parent0ea001d3b43cc9d387c093ae205c4228cd88a886 (diff)
ARM: rockchip: fix undefined instruction of reset_ctrl_regs
Sometimes the debug module may not work well after resume, since it has not been correctly reset when wakeup from suspend. That cause system crash during reusme, and a 'undefined instruction' is displayed on the console. Set the GRF_FORCE_JTAG bit of RK3288_GRF_SOC_CON0 can ensure that debug modul is reset. And we can change the value of RK3288_GRF_SOC_CON0 back when system resume. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> According to discussions, there does not seem a better solution available. Please also see the potential security implication described in the comment inline in the code. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/mach-rockchip/pm.h')
-rw-r--r--arch/arm/mach-rockchip/pm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index 3e8d39c0c3d5..f8a747bc1437 100644
--- a/arch/arm/mach-rockchip/pm.h
+++ b/arch/arm/mach-rockchip/pm.h
@@ -48,6 +48,10 @@ static inline void rockchip_suspend_init(void)
#define RK3288_PMU_WAKEUP_RST_CLR_CNT 0x44
#define RK3288_PMU_PWRMODE_CON1 0x90
+#define RK3288_GRF_SOC_CON0 0x244
+#define GRF_FORCE_JTAG BIT(12)
+#define GRF_FORCE_JTAG_WRITE BIT(28)
+
#define RK3288_SGRF_SOC_CON0 (0x0000)
#define RK3288_SGRF_FAST_BOOT_ADDR (0x0120)
#define SGRF_PCLK_WDT_GATE BIT(6)