diff options
| author | Jan Luebbe <jlu@pengutronix.de> | 2019-08-27 21:49:22 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-08-29 07:58:01 +0100 |
| commit | 921a3fe5be2dd0aac70405faf32a970716f55e03 (patch) | |
| tree | a328dd915521e7fa50adf79a1510b6c98f277c17 /arch/arm/mm | |
| parent | 6dc5fd93b2f1ef75d5e50fced8cb193811f25f22 (diff) | |
ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware
This include file will be used by the AURORA EDAC code.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/cache-aurora-l2.h | 55 | ||||
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 2 |
2 files changed, 1 insertions, 56 deletions
diff --git a/arch/arm/mm/cache-aurora-l2.h b/arch/arm/mm/cache-aurora-l2.h deleted file mode 100644 index c86124769831..000000000000 --- a/arch/arm/mm/cache-aurora-l2.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * AURORA shared L2 cache controller support - * - * Copyright (C) 2012 Marvell - * - * Yehuda Yitschak <yehuday@marvell.com> - * Gregory CLEMENT <gregory.clement@free-electrons.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARM_HARDWARE_AURORA_L2_H -#define __ASM_ARM_HARDWARE_AURORA_L2_H - -#define AURORA_SYNC_REG 0x700 -#define AURORA_RANGE_BASE_ADDR_REG 0x720 -#define AURORA_FLUSH_PHY_ADDR_REG 0x7f0 -#define AURORA_INVAL_RANGE_REG 0x774 -#define AURORA_CLEAN_RANGE_REG 0x7b4 -#define AURORA_FLUSH_RANGE_REG 0x7f4 - -#define AURORA_ACR_REPLACEMENT_OFFSET 27 -#define AURORA_ACR_REPLACEMENT_MASK \ - (0x3 << AURORA_ACR_REPLACEMENT_OFFSET) -#define AURORA_ACR_REPLACEMENT_TYPE_WAYRR \ - (0 << AURORA_ACR_REPLACEMENT_OFFSET) -#define AURORA_ACR_REPLACEMENT_TYPE_LFSR \ - (1 << AURORA_ACR_REPLACEMENT_OFFSET) -#define AURORA_ACR_REPLACEMENT_TYPE_SEMIPLRU \ - (3 << AURORA_ACR_REPLACEMENT_OFFSET) - -#define AURORA_ACR_FORCE_WRITE_POLICY_OFFSET 0 -#define AURORA_ACR_FORCE_WRITE_POLICY_MASK \ - (0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) -#define AURORA_ACR_FORCE_WRITE_POLICY_DIS \ - (0 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) -#define AURORA_ACR_FORCE_WRITE_BACK_POLICY \ - (1 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) -#define AURORA_ACR_FORCE_WRITE_THRO_POLICY \ - (2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) - -#define MAX_RANGE_SIZE 1024 - -#define AURORA_WAY_SIZE_SHIFT 2 - -#define AURORA_CTRL_FW 0x100 - -/* chose a number outside L2X0_CACHE_ID_PART_MASK to be sure to make - * the distinction between a number coming from hardware and a number - * coming from the device tree */ -#define AURORA_CACHE_ID 0x100 - -#endif /* __ASM_ARM_HARDWARE_AURORA_L2_H */ diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 5b251c8ecd45..428d08718107 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -18,8 +18,8 @@ #include <asm/cp15.h> #include <asm/cputype.h> #include <asm/hardware/cache-l2x0.h> +#include <asm/hardware/cache-aurora-l2.h> #include "cache-tauros3.h" -#include "cache-aurora-l2.h" struct l2c_init_data { const char *type; |