ARM: omap1: move 32k counter from plat-omap to mach-omap1

omap2 stopped using this code with commit 8d39ff3d1696 ("ARM: OMAP2+:
Remove unused legacy code for timer"), so just move it to mach-omap1 now,
along with the other half of that driver.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

4 files changed, 1 insertions, 133 deletions

diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 272670ef1e92..dfa19d5030e3 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -72,23 +72,6 @@ config OMAP_MPU_TIMER
 	  timer provides more intra-tick resolution than the 32KHz timer,
 	  but consumes more power.
 
-config OMAP_32K_TIMER
-	bool "Use 32KHz timer"
-	depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
-	default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
-	help
-	  Select this option if you want to enable the OMAP 32KHz timer.
-	  This timer saves power compared to the OMAP_MPU_TIMER, and has
-	  support for no tick during idle. The 32KHz timer provides less
-	  intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
-	  currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX.
-
-	  On OMAP2PLUS this value is only used for CONFIG_HZ and
-	  CLOCK_TICK_RATE compile time calculation.
-	  The actual timer selection is done in the board file
-	  through the (DT_)MACHINE_START structure.
-
-
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
 	bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
 	depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 371f2ed00eda..98a7b607873a 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -6,7 +6,7 @@
 ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include
 
 # Common support
-obj-y := sram.o dma.o counter_32k.o
+obj-y := sram.o dma.o
 
 # omap_device support (OMAP2+ only at the moment)
 
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
deleted file mode 100644
index 7a729ade2105..000000000000
--- a/arch/arm/plat-omap/counter_32k.c
+++ /dev/null
@@ -1,114 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * OMAP 32ksynctimer/counter_32k-related code
- *
- * Copyright (C) 2009 Texas Instruments
- * Copyright (C) 2010 Nokia Corporation
- * Tony Lindgren <tony@atomide.com>
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/clocksource.h>
-#include <linux/sched_clock.h>
-
-#include <asm/mach/time.h>
-
-#include <plat/counter-32k.h>
-
-/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
-#define OMAP2_32KSYNCNT_REV_OFF		0x0
-#define OMAP2_32KSYNCNT_REV_SCHEME	(0x3 << 30)
-#define OMAP2_32KSYNCNT_CR_OFF_LOW	0x10
-#define OMAP2_32KSYNCNT_CR_OFF_HIGH	0x30
-
-/*
- * 32KHz clocksource ... always available, on pretty most chips except
- * OMAP 730 and 1510.  Other timers could be used as clocksources, with
- * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
- * but systems won't necessarily want to spend resources that way.
- */
-static void __iomem *sync32k_cnt_reg;
-
-static u64 notrace omap_32k_read_sched_clock(void)
-{
-	return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
-}
-
-/**
- * omap_read_persistent_clock64 -  Return time from a persistent clock.
- *
- * Reads the time from a source which isn't disabled during PM, the
- * 32k sync timer.  Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec64.
- */
-static struct timespec64 persistent_ts;
-static cycles_t cycles;
-static unsigned int persistent_mult, persistent_shift;
-
-static void omap_read_persistent_clock64(struct timespec64 *ts)
-{
-	unsigned long long nsecs;
-	cycles_t last_cycles;
-
-	last_cycles = cycles;
-	cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
-
-	nsecs = clocksource_cyc2ns(cycles - last_cycles,
-					persistent_mult, persistent_shift);
-
-	timespec64_add_ns(&persistent_ts, nsecs);
-
-	*ts = persistent_ts;
-}
-
-/**
- * omap_init_clocksource_32k - setup and register counter 32k as a
- * kernel clocksource
- * @pbase: base addr of counter_32k module
- * @size: size of counter_32k to map
- *
- * Returns 0 upon success or negative error code upon failure.
- *
- */
-int __init omap_init_clocksource_32k(void __iomem *vbase)
-{
-	int ret;
-
-	/*
-	 * 32k sync Counter IP register offsets vary between the
-	 * highlander version and the legacy ones.
-	 * The 'SCHEME' bits(30-31) of the revision register is used
-	 * to identify the version.
-	 */
-	if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
-						OMAP2_32KSYNCNT_REV_SCHEME)
-		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
-	else
-		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
-
-	/*
-	 * 120000 rough estimate from the calculations in
-	 * __clocksource_update_freq_scale.
-	 */
-	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
-			32768, NSEC_PER_SEC, 120000);
-
-	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
-				250, 32, clocksource_mmio_readl_up);
-	if (ret) {
-		pr_err("32k_counter: can't register clocksource\n");
-		return ret;
-	}
-
-	sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
-	register_persistent_clock(omap_read_persistent_clock64);
-	pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
-
-	return 0;
-}
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
deleted file mode 100644
index da000d482ff2..000000000000
--- a/arch/arm/plat-omap/include/plat/counter-32k.h
+++ /dev/null
@@ -1 +0,0 @@
-int omap_init_clocksource_32k(void __iomem *vbase);