diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-09-19 11:05:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-09-19 11:05:05 -0700 |
| commit | f1c9c9797a7c519a70b8e4607f41d97ec59fc8f0 (patch) | |
| tree | 42b0cbfeb946a76844d20c7aae39037f5e1c7ba3 /arch/arm/plat-samsung/include/plat/gpio-cfg.h | |
| parent | 112d421df2fddc0278584b084f4fcfedd144c5f4 (diff) | |
| parent | 4d89ecaae9c145e60b920acb1120f1de3d6eac6e (diff) | |
Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Add IORESOURCE_IRQ_HIGHLEVEL flag to dm9000 on mach-real6410
ARM: S3C64XX: Fix coding style errors on mach-real6410
ARM: S3C64XX: Prototype SPI devices
ARM: S3C64XX: Fix dev-spi build
ARM: SAMSUNG: Fix on s5p_gpio_[get,set]_drvstr
ARM: SAMSUNG: Fix on drive strength value
ARM: S5PV210: Add FIMC clocks
ARM: S5PV210: Reduce the iodesc length of systimer
ARM: S5PV210: Update I2C-1 Clock Register Property.
ARM: S5P: Decrease IO Registers memory region size on FIMC
ARM: S5P: Fix DMA coherent mask for FIMC
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-cfg.h')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index db4112c6f2be..1c6b92947c5d 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -143,12 +143,12 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, - * configurable on most pins on the S5C series. + * configurable on most pins on the S5P series. */ -#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00) -#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01) -#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10) -#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11) +#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0) +#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2) +#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1) +#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3) /** * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin |