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authorLinus Torvalds <torvalds@linux-foundation.org>2019-05-24 11:03:26 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-05-24 11:03:26 -0700
commit0a72ef89901409847036664c23ba6eee7cf08e0e (patch)
treebb20f0011292a0e1abb4326a1387c4649313aac9 /arch/arm64/Kconfig
parentc50bbf615f2f0028ad1771506ef8807130ccc2ce (diff)
parentedbcf50eb8aea5f81ae6d83bb969cb0bc02805a1 (diff)
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull more arm64 fixes from Will Deacon: - Fix incorrect LDADD instruction encoding in our disassembly macros - Disable the broken ARM64_PSEUDO_NMI support for now - Add workaround for Cortex-A76 CPU erratum #1463225 - Handle Cortex-A76/Neoverse-N1 erratum #1418040 w/ existing workaround - Fix IORT build failure if IOMMU_SUPPORT=n - Fix place-relative module relocation range checking and its interaction with KASLR * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: insn: Add BUILD_BUG_ON() for invalid masks arm64: insn: Fix ldadd instruction encoding arm64: Kconfig: Make ARM64_PSEUDO_NMI depend on BROKEN for now arm64: Handle erratum 1418040 as a superset of erratum 1188873 arm64/module: deal with ambiguity in PRELxx relocation ranges ACPI/IORT: Fix build error when IOMMU_SUPPORT is disabled arm64/kernel: kaslr: reduce module randomization range to 2 GB arm64: errata: Add workaround for Cortex-A76 erratum #1463225 arm64: Remove useless message during oops
Diffstat (limited to 'arch/arm64/Kconfig')
-rw-r--r--arch/arm64/Kconfig26
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ca9c175fb949..697ea0510729 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -476,16 +476,15 @@ config ARM64_ERRATUM_1024718
If unsure, say Y.
-config ARM64_ERRATUM_1188873
+config ARM64_ERRATUM_1418040
bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result"
default y
depends on COMPAT
- select ARM_ARCH_TIMER_OOL_WORKAROUND
help
This option adds a workaround for ARM Cortex-A76/Neoverse-N1
- erratum 1188873.
+ errata 1188873 and 1418040.
- Affected Cortex-A76/Neoverse-N1 cores (r0p0, r1p0, r2p0) could
+ Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
cause register corruption when accessing the timer registers
from AArch32 userspace.
@@ -521,6 +520,24 @@ config ARM64_ERRATUM_1286807
If unsure, say Y.
+config ARM64_ERRATUM_1463225
+ bool "Cortex-A76: Software Step might prevent interrupt recognition"
+ default y
+ help
+ This option adds a workaround for Arm Cortex-A76 erratum 1463225.
+
+ On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
+ of a system call instruction (SVC) can prevent recognition of
+ subsequent interrupts when software stepping is disabled in the
+ exception handler of the system call and either kernel debugging
+ is enabled or VHE is in use.
+
+ Work around the erratum by triggering a dummy step exception
+ when handling a system call from a task that is being stepped
+ in a VHE configuration of the kernel.
+
+ If unsure, say Y.
+
config CAVIUM_ERRATUM_22375
bool "Cavium erratum 22375, 24313"
default y
@@ -1406,6 +1423,7 @@ config ARM64_MODULE_PLTS
config ARM64_PSEUDO_NMI
bool "Support for NMI-like interrupts"
+ depends on BROKEN # 1556553607-46531-1-git-send-email-julien.thierry@arm.com
select CONFIG_ARM_GIC_V3
help
Adds support for mimicking Non-Maskable Interrupts through the use of