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authorAndre Przywara <andre.przywara@arm.com>2021-01-13 15:26:28 +0000
committerMaxime Ripard <maxime@cerno.tech>2021-01-14 12:50:22 +0100
commit948c657cc45e8ce48cb533d4e2106145fa765759 (patch)
tree6d463fa55b2f3f6a929d61b9da46d974fe26127c /arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
parentcfe6c487b9a1abc6197714ec5605716a5428cf03 (diff)
arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz
In contrast to the H6 (and later) manuals, the A64 datasheet does not specify any limitations in the maximum possible frequency for eMMC controllers. However experimentation has found that a 150 MHz limit similar to other SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist for the MMC2 controller. Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi. The Pinebook seems to be the an odd exception, since it apparently seems to work with 200 MHz as well, so overwrite this in its board .dts file. Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works. Fixes: 22be992faea7 ("arm64: allwinner: a64: Increase the MMC max frequency") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210113152630.28810-7-andre.przywara@arm.com
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index d07cf05549c3..7ae16541d14f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -167,6 +167,7 @@
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
+ max-frequency = <200000000>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;