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authorDinh Nguyen <dinguyen@kernel.org>2018-01-31 14:58:02 -0600
committerDinh Nguyen <dinguyen@kernel.org>2018-04-16 09:04:29 -0500
commitd93101abe41e9596555a0f7f6f775e543b71c441 (patch)
treeab2e8be2b5c0f018ca04e0b6232bbf5f4032ae01 /arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
parent60cc43fc888428bb2f18f08997432d426a243338 (diff)
arm64: dts: stratix10: use clock bindings for the Stratix10 platform
Use the clock bindings for the Stratix10 SoC. This includes changing the old binding of "intc,clk-s10-mgr" to "intel,stratix10-clkmgr". The reason that this can be done is that there are currently no clock driver for Stratix10, thus there are no consumers of the old binding. So changing the binding will not break any legacy code. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v7: - move PLL out of clkmgr node and into DT root v6: - no changes v5: - no changes v4: - remove '_' in name of clock nodes - use clock-controller in SoCDK node in dts file v3: - use the correct vendor prefix - explain the binding change v2: - use a single clock binding for the clock controller
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts')
-rw-r--r--arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index eaf13fe29287..bec15e8e6c42 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -50,6 +50,14 @@
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
+
+ soc {
+ clocks {
+ osc1 {
+ clock-frequency = <25000000>;
+ };
+ };
+ };
};
&gpio1 {