diff options
author | Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> | 2014-11-26 11:51:09 +0700 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-28 16:09:05 +0100 |
commit | 419043609689d0aba9f727a6faf1ff406e269ecf (patch) | |
tree | 36e56fa463d1e9837783517be8fd509e9eee2da5 /arch/arm64/boot/dts/amd/amd-overdrive.dts | |
parent | 71f867ec130e3cc8e692366fdf8941ded27c727e (diff) |
arm64: amd-seattle: Adding device tree for AMD Seattle platform
Initial revision of device tree for AMD Seattle Development platform.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Thomas Lendacky <Thomas.Lendacky@amd.com>
Signed-off-by: Joel Schopp <Joel.Schopp@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/amd/amd-overdrive.dts')
-rw-r--r-- | arch/arm64/boot/dts/amd/amd-overdrive.dts | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts new file mode 100644 index 000000000000..564a3f7df71d --- /dev/null +++ b/arch/arm64/boot/dts/amd/amd-overdrive.dts @@ -0,0 +1,66 @@ +/* + * DTS file for AMD Seattle Overdrive Development Board + * + * Copyright (C) 2014 Advanced Micro Devices, Inc. + */ + +/dts-v1/; + +/include/ "amd-seattle-soc.dtsi" + +/ { + model = "AMD Seattle Development Board (Overdrive)"; + compatible = "amd,seattle-overdrive", "amd,seattle"; + + chosen { + stdout-path = &serial0; + linux,pci-probe-only; + }; +}; + +&ccp0 { + status = "ok"; +}; + +&gpio0 { + status = "ok"; +}; + +&gpio1 { + status = "ok"; +}; + +&i2c0 { + status = "ok"; +}; + +&pcie0 { + status = "ok"; +}; + +&spi0 { + status = "ok"; +}; + +&spi1 { + status = "ok"; + sdcard0: sdcard@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <20000000>; + voltage-ranges = <3200 3400>; + gpios = <&gpio0 7 0>; + interrupt-parent = <&gpio0>; + interrupts = <7 3>; + pl022,hierarchy = <0>; + pl022,interface = <0>; + pl022,com-mode = <0x0>; + pl022,rx-level-trig = <0>; + pl022,tx-level-trig = <0>; + }; +}; + +&v2m0 { + arm,msi-base-spi = <64>; + arm,msi-num-spis = <256>; +}; |